The 74LS73 device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse. The data on the J and K inputs is allowed to change while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated. A low logic level on the clear input will reset the outputs regardless of the levels of the other inputs.
Features:-
• Two Independent Negative Edge Triggered JK Flip-Flops
• Clear Input Resets the Output
• Fast Switching Times
• Operating Temperature up to 70°C
• Standard TTL Switching Voltages
Specifications:-
| Parameter | Specification |
| Supply Voltage (VCC) | 7 V |
| Input Voltage (VI) | 7 V |
| Operating free-air temperature range | 0°C to +70°C |
| Storage temperature range | –65°C to +150°C |
Related Document:-
| Brand/Manufacturer | Generic |
| Country Of Origin | China |
| Packer / Importer Address | Constflick Technologies Limited, Building No 13 and 14, 3rd Floor, 2nd Main, Siddaiah Road, Bangalore, Karnataka - 560027 India. |
| MRP | Rs. 71.98 (Inclusive of all Taxes) |
* Product Images are shown for illustrative purposes only and may differ from actual product.
74LS73 Dual JK Flip-Flop with Clear IC (7473 IC) DIP-14 Package
- Product Code: EC-0400
- Availability: 2834
-
Rs.69.00
- (Excluding 18% GST)